Atomics

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Architecture single-copy r/w atomicity TAS cmpxchg xadd gcc support from version last year sold cur. PG support references
x86-32(386) ? y (via xchgb) n n 4.1 2007 not fully contained in architecture manual anymore
x86-32(486) 4 y (via xchgb/xadd) 4 (via cmpxchg) 4 (via xadd) 4.1 Intel® 64 and IA-32 Architectures Software Developer’s Manual, Vol 3A, Section 8.1.1

Instruction SetReference, A-M, CMPXCHG

x86-32(586+) 1/2/4/8 y (via xchgb/xadd) 1/2/4/8 (via cmpxchg/cmpxchg8b) 1/2/4/8 (via xadd/cmpxchg8b) 4.1 Intel® 64 and IA-32 Architectures Software Developer’s Manual, Vol 3A, Section 8.1.1
x86-64 1/2/4/8/16 y (via xchgb/xadd) 1/2/4/8/16* (via cmpxchg/cmpxchg16b) 1/2/4/8/16* (via xadd/cmpxchg16b) 4.1 Intel® 64 and IA-32 Architectures Software Developer’s Manual, Vol 3A, Section 8.1.1
alpha 4/8 y 4/8 (via LL/SC) 4/8 (via LL/SC) 4.1 2007 gcc only "AXP architecture manual ftp://ftp.netbsd.org/pub/NetBSD/misc/dec-docs/index.html#EY-T132E-DP" section 5.5.2, 5.2.2
arm-v5 and earlier 1/2/4?/8*** y (via SWPB) n *** n *** 4.6/4.4 (linux) gcc only
arm-v6+

(application profiles, w. MMU)

1/2/4/8*** y (via ldrex/strex) 4 (via ldrex/strex) 4 (via ldrex/strex) 4.6/4.4 (linux) gcc only "Arm Architecture Manual" A3.5.3 Atomicity in the ARM architecture
arm-v7+

(application profiles, w. MMU)

1/2/4/8*** y (via ldrex/strex) 1/2/4/8 (via ldrex/strex) 1/2/4/8 (via ldrex/strex) 4.6/4.4 (linux) gcc only "Arm Architecture Manual" A3.5.3 Atomicity in the ARM architecture
powerpc 1/2/4/8 y (via lwarx/stwcx) 4/8 (via lwarx/stwcx, 8 only some versions) 4/8 (via lwarx/stwcx) 4.1 gcc only "PowerPC Microprocessor Family: The Programming Environments for 32-Bit Microprocessors": 5.1.2 Atomicity

"Enhanced PowerPC™ Architecture": 6.1.3 Single-Copy Atomicity

64bit powerpc 1/2/4/8 y (via lwarx/stwcx,ldarx/stdcx) 1/2/4/8 (LL/SC) 1/2/4/8 (LL/SC) 4.1 gcc only "Enhanced PowerPC™ Architecture": 6.1.3 Single-Copy Atomicity
s390/s390x 4/8** y (via compare/swap) 4/8 (cs/cds) 4/8 (cs/cds) 4.1 gcc only "z/Architecture Principles of Operation": 7-53 Compare and Swap, 5-89 Storage-Operand Consistency
sparcv8 1/2/4/8 y (via ldstub) n n 4.2 1997 gcc,sunpro "The Sparc Architecture Manual Version 8" : 6.1 Basic Definitions, Overview of Model
sparcv9 1/2/4/8 y (via ldstub) 4/8 (via cas/casx) 4/8 (via cas/casx) 4.2 gcc,sunpro "The Sparc Architecture Manual Version 9" : D.4.1 Value Atomicity
mips/mipsel 4?**** y (ll/sc) 4/8 (ll/sc) 4/8 (ll/sc) 4.3 gcc "MIPS Architecture Manual Vol I" : 4.1.1.4: Loads and stores Used For Atomic Updates
mips64 4?/8?**** y (ll/sc) 4 (ll/sc, lld/scd) 4 (ll/sc, lld/scd) 4.3 gcc "MIPS Architecture Manual Vol I" : 4.1.1.4: Loads and stores Used For Atomic Updates
m68k 4?**** y 4 (via cas) 4 (via cas) 4.7 gcc linux/netbsd???***** "m68000 Family Programmers Manual": 3.1.111 Multiprocessor instructions
ia64 1/2/4/8/16 y 4/8 (cmpxchg) 4/8 (xadd) 4.1 - gcc,icc,hpux acc "Intel® Itanium® Architecture Software Developer's Manual": 4.5 Memory Datum Alignment and Atomicity; CMPXCHG8B? - Compare and Exchange
pa-risc 4 y (ldcwx) n n - 2005/2008 gcc, hppa acc "PA-RISC 1.1. Architecture and Instruction Set Reference Manual": 4-3 Atomicity of Storage Accesses, 3-16 The Synchronization Primitive, 5.40 Load and Clear Word Indexed
m32r requires patched glibc

unmaintained website/mostly dead

http://www.linux-m32r.org/
VAX 1997/2005 gcc/netbsd http://web.archive.org/web/20000815201016/http://www.compaq.com/alphaserver/vax/vax_letter_final.html

* excluding some early AMD64 models

** only a rather limited number of instructions adhere

*** linux kernel emulation available

**** linux and various libraries assume 4 and 8. Seems to be undocumented.

***** coldfire < v4 is unsupported as PG uses tas which has been removed from coldfire CPUs (which has no MMU anyway)

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